V.I. Hahanov, I.V. Iemelianov, M.M. Liubarskyi,
S.V. Chumachenko, E.I. Litvinova, Tamer Bani Amer

Èlektron. model. 2017, 39(6):59-92


Innovative methods have been developed for taking Boolean derivatives, test synthesis on their basis, as well as deductive fault simulation for functional elements specified by the qubit coverage. The analysis methods use vector logical operations: and, or, not, xor, as well as opposite shift of the parts of the qubit form of functionality. Examples of combinational circuits for verification and comparative analysis of the performance of basic and proposed methods are presented. The structure of the embedded processor is described, which executes the operations of taking derivatives, test synthesis, deductive fault simulation for evaluating the quality of input test patterns and diagnosis. The proposed technologies are focused on their implementation in a cloud service or IP-infrastructure of SoC architectures.


test synthesis, SoC design and verification, qubit coverage, digital circuit, fault simulation, Boolean derivative, deductive fault simulation.


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