SYSTOLIC ARCHITECTURE OF MATRIX PROCESSOR FOR CLASSIFIER OF OBJECTS

T.B. Martyniuk, L.V. Krupelnytskyi, M.V. Mykytiuk, M.O. Zaitsev

Èlektron. model. 2021, 43(3):36-46
https://doi.org/10.15407/emodel.43.03.036

ABSTRACT

One of the known methods of object classification is considered, in which the criterion of classification by the maximum of discriminant functions is realized. This method has found effective application as a classical computational model, in particular in the medical diagnosis of diseases. The process of classification by this method can be implemented as spatially distributed processing on columns and rows of the matrix, which can be described as regular iterative algorithms. This allows you to display them on a two-dimensional systolic array of the matrix processor as part of the classifier of objects with subsequent placement in the FPGA. The proposed matrix processor works in two modes and has a number of specific properties, such as performing the decrement operation simultaneously for all elements in each column of the processor matrix, as well as the use of zero signal (zero) of elements in each row and each matrix column as a result of processing of discriminant functions and for synchronization of the process. In the future, based on the results of processing in the matrix processor, the output signals of the classifier are formed with the definition of a specific class of objects.

KEYWORDS

systolic architecture, discriminant function, classifier of objects.

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